Summary: Using the MSP-EXP430FG4618 Development Tool and the MSP430FG4618 device implement a Buzzer tone generator.
Buzzer tone generator
Introduction
Correct system timing is a fundamental requirement for the proper operation of a real-time application. The timing definition can dictate how the data information processed during the execution of the application program. The clock implementations vary between devices in the MSP430 family. Each device provides different clock sources, controls and uses. This chapter discusses the clock controls included in the platforms used.
The MSP430 4xx family has two general-purpose 16-bit or 8-bit counters and event timers, named Timer_A, Timer_B, and a Basic Timer. The Basic Timer module is only implemented in ‘4xx devices. The 2xx device family also has Timer_A and Timer_B, but the clock signals are provided by the basic clock module+.
The timers may receive an internal or external clock. Timer_A and Timer_B also include multiple independent capture and compare blocks, with interrupt capabilities.
Overview
The purpose of this laboratory is to build a sound generator using Timer_B. The PWM signal produced by this peripheral drives the buzzer, producing a sequence of musical notes at regular time intervals. At the same time, LED1 and LED2 switch state alternately. The volume of sound produced by the buzzer can be controlled by push buttons SW1 and SW2.
Resources
The implementation of this application ( Lab4_Timers.c ) requires the production of specific frequency signals corresponding to musical notes. For each frequency, the duty-cycle can be modified in order to control the volume of sound produced. This task is carried out using Timer_B and one of its compare units. The buzzer is operated by Port P3.5, configured to work in its special function as TB4 compare unit output. This output corresponds to the TBCCR4 output compare unit.
The push buttons SW1 and SW2 are connected to ports P1.0 and P1.1 respectively. An interrupt is generated when either of these buttons are pressed. The duty-cycle of the generated note is modified in response.
Basic Timer1 is configured to generate an interrupt once every second. The interrupt service routine updates the musical notes produced by the buzzer, which are stored in an array.
LED1 and LED2 are driven from P2.2 and P2.1 respectively, and their state is switched alternately once every second.
The module FLL+ is configured to a 7.995392 MHz frequency, for the MCLK and SMCLK clock signals.
The resources used by the application are:
- Timer_B;
- Basic Timer1;
- I/O ports;
- FLL+;
- Interrupts.
Software application organization
The application consists of the routine
main(), which is used to configure all system resources, before entering into a standby mode, waiting for one of two interrupts.This routine starts by disabling the watchdog timer and starting the module FLL+ to produce the desired clock signals of the correct frequency for the SMCLK and MCLK. Then, the Basic Timer1 and Timer_B are configured in order to perform the desired functions.
The ports connected to the LEDs, buttons and buzzer are then initialized.
Finally, the interrupts are activated, and the application waits for the execution of one of two interrupts.
The Basic Timer1 interrupt executes at a frequency of once every second. When this interrupt is occurs, it begins by switching the state of LED1 and LED2. Afterwards, it accesses the memory to fetch the next musical note to be performed. The routine ends with memory pointer management.
The Port 1 ISR begins by evaluating the source of the interrupt. The sound volume is reduced if the button SW1 is pressed. The sound volume is increased if button SW2 is pressed.
System configuration
Timer_B
It is the responsibility of Timer_B to produce the PWM signal that activates the Buzzer. Timer_B counts until the value contained in the TBCCR0 register is reached. It does not generate an interrupt, and must be sourced by SMCLK clock signal:
TBCTL = TBSSEL_2 | CNTL_0 | TBCLGRP_0 |MC_1 | ID_0;Each PWM signal produced by Timer_B corresponds to a musical note. The relationship between the frequency and the musical note is given in Table 1.
| Note | SI0 | DO | RE | MI | FA | SOL | LA | SI | DO2 |
| Freq [Hz] | 503 | 524 | 587 | 662 | 701 | 787 | 878 | 1004 | 1048 |
Timer_B has a frequency clock input equal to 7.995392 MHz.
The value to write in the TBCCR0 register in order to generate the desired frequency is:
// TBCCR0 value of the musical notes
#define SI0 15895
#define DO 15258
#define RE 13620
#define MI 12077
#define FA 11405
#define SOL 10159
#define LA 9106
#define SI 7963
#define DO2 7629
TBCCTL4 = OUTMOD_3; // CCR4 interrupt enabled
TBCCR4 = space[0]/2;
Timer_A configuration
TACTL = TASSEL_2 |MC_2 | ID_0 | TAIE; // SMCLK, continuous mode up to 0xffff
TACCTL1 = CM1 | CCIS_0 | CAP | CCIE;// Capture on rising edge, Cap mode,
// Cap/Com int. enable, TACCR1 input signal selected
//*********************************************************
// Timer A ISR
//*********************************************************
#pragma vector=TIMERA1_VECTOR
__interrupt void TimerA1_ISR (void)
{
switch (TAIV)
{
case TAIV_TACCR1:
if (capture == 0){
T1 = TACCR1;
flag = 1;
capture = 1;
}
else {
if (flag == 1) {
T2 = TACCR1;
if (T2 > T1)
T = T2-T1;
}
else{
TAR = 0;
}
capture = 0;
flag = 0;
}
break;
case TAIV_TACCR2:
break;
case TAIV_TAIFG:
tick++;
if (tick == 60){
LCD_freq();
tick = 0;
}
if (flag == 1)flag = 0;
break;
default:
break;
}
}
Basic Timer1
The Basic Timer1 generates an interrupt once every second. It uses two counters in series, where the BTCNT2 counter input uses the BTCNT1 counter output divided by 256. The BTCNT1 counter input is the ACLK clock signal with a frequency of 32.768 kHz.
If BTCNT2 counter selected output is divided by 128, what is the time period associated with the Basic Timer1 interrupt? _________
What are the values to write to the configuration registers?
BTCTL = BTDIV | BT_fCLK2_DIV128; // (ACLK/256)/128
IE2 |= BTIE; // enable BT interrupt
//*********************************************************
// Basic Timer ISR. Run with 1 sec period
//*********************************************************
#pragma vector=BASICTIMER_VECTOR
__interrupt void basic_timer_ISR(void)
{
unsigned int read_data; // read data from file , frequency in kHz
P2OUT^=0x06; // toogle LED1 and LED2
counter++;
if (counter == 5){
counter = 0;
read_data = 200;
TBCCR0 = 7995392/read_data;
TBCCR4 = TBCCR0/2;
}
}
I/O Ports configuration
// SW1 and SW2 configuration (Port1)
P1SEL &= 0x00; // P1.0 and P1.2 I/O
P1DIR &= 0x00; // P1.0 and P1.2 as inputs
P1IFG = 0x00;
P1IES &= 0xFF // high-to-low transition interrupt
P1IE |= 0xFF; // enable port interrupts
// LED1 and LED2 configuration (Port2):
P2DIR |= 0x06; // P2.2 and P2.1 as outputs
P2OUT = 0x04; // LED1 on and LED2 off
// Buzzer port configuration (Port3)
P3SEL |= 0x20; // P3.5 as special function
P3DIR |= 0x20; // P3.5 as digital output
FLL+ configuration
FLL_CTL0 |= DCOPLUS + XCAP18PF; //DCO+ set,freq=xtal*D*N+1
SCFI0 |= FN_4; // x2 DCO freq, 8MHz nominal DCO
SCFQCTL = 121; // (121+1) x 32768 x 2 = 7.99 MHz
Analysis of operation
System clocks inspection
The MCLK, SMCLK and ACLK system clocks are available at ports P1.1, P1.4 and P1.5 respectively. These ports are located on the SW2, RESET_CC and VREG_EN lines, which are available on the H2 Header pins 2, 5 and 6. All these resources are available because the Chipcon RF module is not installed and SW2 is not used.
Using the Registers view, set bits 1, 4 and 5 of P1SEL and P1DIR registers to choose the secondary function of their ports, that is, configured as outputs. Connect an oscilloscope probe at these positions to monitor the clock signals.
What are the values measured for each of the system clocks?
ACLK: _____________________
SMCLK: ____________________
MCLK: _____________________
TBCCR4 unit output frequency
With the help of an oscilloscope, it is possible to evaluate the operation of the application. Alternatively, it is possible to listen to the sound produced. By removing jumper JP1 and connecting the oscilloscope to this pin, it is possible to view the PWM signal produced by the microcontroller. The duty-cycle can be reduced or increased by pressing the push buttons SW1 and SW2.
Port P1 interrupt source decoding
All Port P1 interrupt lines share the same interrupt vector. The decoding is done through the P1IFG register.
This process can be observed by entering a breakpoint at the first line of the ISR code.
Execute the application.
The application’s execution is suspended at the breakpoint by pressing either button SW1 or SW2. From this point onwards, run the lines of code step-by-step and observe changes in the register values.
Measurement of electrical current drawn
The power consumption was discussed in the previous point. The electrical power required by the system during operation is measured by replacing the jumper on the Header PWR1 by an ammeter, which indicates the electric current taken by device during operation.
What is the value read? __________
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